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Add: READMEs for the a5 bgemm and deferred-completion demos - #1576

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Jul 29, 2026
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Add: READMEs for the a5 bgemm and deferred-completion demos#1576
ChaoWao merged 1 commit into
hw-native-sys:mainfrom
ChaoWao:docs/a5-example-readmes

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@ChaoWao ChaoWao commented Jul 29, 2026

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Summary

The three a5 examples with no a2a3 counterpart to read instead.

bgemm — one source, two cores, no GM round trip

It keeps its kernel in kernels/mix/ rather than kernels/aic/ + kernels/aiv/, and that directory name is the example. The same source is registered as two incores with different core_types:

func_id core_type Guard Does
0 (GEMM) aic __DAV_CUBE__ TLOAD, TMATMUL, TPUSH
1 (ADD) aiv __DAV_VEC__ TPOP, TADD, TSTORE

Both see the same three-tensor args[]. The matmul product moves between the halves through VEC_FIFO and never reaches GM — only the accumulator C round-trips, once per GRID_K iteration.

a2a3's benchmark_bgemm computes the same thing with separate sources and a GM round trip, and exists to sweep shapes. The two are not ports of each other, which the READMEs now say on both sides.

urma_ / sdma_deferred_completion_demo — same protocol, two transports

kernel_consumer.cpp is byte-identical between the two directories, so the transport is the only variable — the useful property when choosing between them. What differs: the transfer kernel, its completion header, and the build flag.

The load-bearing constraint is in src/a5/platform/onboard/host/CMakeLists.txt:

option(SIMPLER_ENABLE_PTO_SDMA_WORKSPACE "..." OFF)
option(SIMPLER_ENABLE_PTO_URMA_WORKSPACE "..." OFF)
if(SIMPLER_ENABLE_PTO_SDMA_WORKSPACE AND SIMPLER_ENABLE_PTO_URMA_WORKSPACE)
    message(FATAL_ERROR "... mutually exclusive because CommContext exposes a
                         single workSpace/workSpaceSize pair")
endif()

Both default OFF and one build can carry one overlay, not both. So a stock build skips both tests even on a5 silicon — a green CI run is not coverage of either path, which seemed worth stating plainly. Each README gives the two-step invocation, since the env var is read twice for different reasons: simpler_setup/runtime_builder.py:381-386 forwards it to CMake so the overlay compiles in, and the test's skipif reads it from the environment.

Index corrections

The a5 index carried the same wrong one-liner the a2a3 one did before #1571:

  • paged_attention_unroll_manual_scope was "Manual scope plus loop unrolling". The kernels are rewritten — aiv_softmax_prepare.cpp changes 269 lines against a 149-line original — so it is a second implementation.
  • paged_attention_manual_scope now records that its four kernels are byte-identical to the baseline's and only the orchestration differs, 52 lines of 288.

Testing

  • markdownlint-cli2 --config tests/lint/.markdownlint.yaml — 0 errors on all four files
  • Every relative link resolves
  • Mix-kernel mechanics from kernels/mix/kernel_bgemm.cpp and the two incores entries in test_bgemm.py; "mix" confirmed as a live sentinel in deps_viewer.py, l0_swimlane.py, sched_overhead_analysis.py
  • Overlay exclusivity and defaults read from src/a5/platform/onboard/host/CMakeLists.txt:47-53; env forwarding from simpler_setup/runtime_builder.py:381-386; kernel_consumer.cpp identity via diff -q
  • Per-file diff counts for the index corrections reproduced with diff | grep -c '^[<>]'
  • Examples not executed — no built project venv in this worktree; documentation only

Docs only; no code, test, or build files touched.

The three a5 examples with no a2a3 counterpart to read instead.

`bgemm` keeps its kernel in `kernels/mix/` rather than `kernels/aic/` plus
`kernels/aiv/`, and that directory name is the example. One source is
registered as two incores with different core_types; `__DAV_CUBE__` compiles
the TLOAD/TMATMUL/TPUSH half and `__DAV_VEC__` the TPOP/TADD/TSTORE half, both
over the same three-tensor args[]. The matmul product moves between them
through VEC_FIFO and never reaches GM — only the accumulator C round-trips.
a2a3's `benchmark_bgemm` computes the same thing with separate sources and a
GM round trip, so the two are not ports of each other.

`urma_deferred_completion_demo` and `sdma_async_completion_demo` run an
identical two-rank protocol over different transports; `kernel_consumer.cpp`
is byte-identical between them, leaving the transport as the only variable.
Both are gated behind a workspace overlay that defaults OFF, and the two
overlays are mutually exclusive in one build — `CommContext` exposes a single
workSpace/workSpaceSize pair, so the CMakeLists raises a FATAL_ERROR if both
are on. A stock build therefore skips both tests even on a5 silicon: a green
CI run is not coverage of either path. Each README gives the two-step
invocation, since the env var is read once by runtime_builder.py to compile
the overlay in and once by the test's skipif.

The a5 index gains those facts, and its `paged_attention_unroll_manual_scope`
row is corrected the same way the a2a3 index was in hw-native-sys#1571: the kernels are
rewritten (softmax_prepare changes 269 lines against a 149-line original), so
it is a second implementation rather than manual scope plus an unroll. The
manual_scope row now records that its four kernels are byte-identical to the
baseline's and only the orchestration differs, 52 lines of 288.

Co-Authored-By: Claude Opus 5 (1M context) <noreply@anthropic.com>
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📥 Commits

Reviewing files that changed from the base of the PR and between b079a23 and 196bdbd.

📒 Files selected for processing (4)
  • examples/a5/tensormap_and_ringbuffer/README.md
  • examples/a5/tensormap_and_ringbuffer/bgemm/README.md
  • examples/a5/tensormap_and_ringbuffer/sdma_async_completion_demo/README.md
  • examples/a5/tensormap_and_ringbuffer/urma_deferred_completion_demo/README.md

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@ChaoWao
ChaoWao merged commit 83b75f0 into hw-native-sys:main Jul 29, 2026
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@ChaoWao
ChaoWao deleted the docs/a5-example-readmes branch July 29, 2026 09:17
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